1. Field of the Invention
This disclosure relates to fixed size packet switches, such as asynchronous transfer mode (ATM) switches, and in particular to an apparatus and method for scheduling cell inputs through ATM switches.
2. Description of the Related Art
Advances in high-speed cell-based communications have been prompted by a number of factors, including increased traffic on the "Information Superhighway", the high bandwidth requirements of video-on-demand, the convergence of technology trends enabling high-speed communications, such as laser-optic technology, and the progress of ATM communications which makes possible the unification of the transmission of voice, video, and data in a common technology.
ATM offers uniformity of network protocols with respect to both cell content (voice, data, etc.) and network scale. Standardized cell formats in ATM support voice traffic in large commercial telephone networks and simplify the design of switches for smaller networks.
Using round robin scheduling, an output-buffered switch may run at multi-gigabit speeds but is prohibitively expensive to implement. Generally, fair prioritized round robin (PRR) scheduling provides fair resolution when there is conflict for resources. Such PRR scheduling has been discussed in, for example, E. L. Hahne, "Round Robin Scheduling for Fair Flow Control in Data Communication Networks", LABORATORY FOR INFORMATION AND DECISION SYSTEMS, Mass. Inst. Tech., Cambridge, Mass. 02139.
For input buffered switches, methods such as bandwidth reservation and static scheduling have been implemented to provide cell scheduling. Another scheduling method, Iterative Round Robin Matching with Slip, is discussed in McKeown et al., "Scheduling Cells in an Input-Queued Switch," ELECTRONICS LETTERS, December 1993. Another scheduling method is Parallel Iterative Matching (PIM) discussed in T. E. Anderson et al., "High-Speed Switch Scheduling for Local-Area Networks," ACM TRANS. ON COMPUTER SYSTEMS, 11(4):319-352, 1993. PIM switch scheduling methods allocating bandwidth fairly among the links may be very unfair in allocating bandwidth between virtual circuits.